1. Field of the Invention
The present invention relates to a method of simulating a semiconductor integrated circuit. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for accurately simulating the resistance of a device for variations in length, width, and voltage.
2. Discussion of the Related Art
Semiconductor integrated circuit designers often use circuit simulators to test circuit designs. Generally, a simulation test may be carried out to verify whether a semiconductor integrated circuit device will operate as designed or not prior to fabrication of the corresponding device. Many designers use simulation software derived from Simulation Program with Integrated Circuit Emphasis (SPICE).
SPICE circuit description files (*.cir files) generally comprise a netlist, or list of circuit elements and the nodes combining circuit elements. SPICE circuit description files may also comprise mathematical formulas describing the behavior of circuit elements. SPICE simulates a circuit model using both standard formulas and these custom mathematical formulas that define actions of various devices included in the circuit design, and provides the corresponding result as verification information.
In conventional SPICE circuit models, the resistance of a resistor element may have a linear relationship to voltage according to the formula:Rtotal=Rsh*(L/W)*(1+VC1*dV);  [Formula 1]                where Rtotal is the total resistance of the resistor,        Rsh is the sheet resistance, or resistance per unit area,        L is the length of the resistor,        W is the width of the resistor,        dV is the potential voltage across the resistor, and        VC1 is a linear voltage coefficient of resistance (VCR) of the resistor.        
In an alternative conventional SPICE model, the resistance of a resistor element may have a non-linear (secondary functional) relationship to voltage according to the formula:Rtotal=Rsh*(L/W)*(1+VC2*dV+VC3*dV2);  [Formula 2]                where Rtotal is the total resistance of the resistor,        Rsh is the sheet resistance, or resistance per unit area,        L is the length of the resistor (e.g., the length of resistor 100 of FIG. 1),        W is the width of the resistor (e.g., the width of resistor 100 of FIG. 1),        VC2 and VC3 are non-linear voltage coefficients of resistance, and        dV is the potential voltage across the resistor.        
Yet, if the model varying according to a voltage is identically applied regardless of the width and length of the resistor device like the modeling according to Formula 1 and Formula 2, the corresponding accuracy may be degraded. Specifically, if the sheet resistance is relatively high or if the resistance is considerably raised due to an increased length of the resistor, the voltage applied to the resistor device may have a larger influence on the resistance than suggested by Formula 1 or Formula 2. Hence, accuracy of the corresponding SPICE modeling may be considerably lowered.
Referring to FIGS. 2 to 4, plotted symbols indicate measured real resistance values; lines represent results of simulating resistance using a simulation model.
Referring to FIG. 2, if a sheet resistance per unit area Rsh is measured while a voltage varying between 0V˜60V is applied to various resistor devices differing in size, it can be seen that the measured sheet resistance varies with the voltage applied. Specifically, the sheet resistance varies with voltage and with the size of the corresponding resistor device. Therefore, conventional SPICE models may not accurately reflect the characteristics of real resistor devices.
FIG. 3 shows a graph of measured resistance and resistance as modeled according to Formula 1. For instance, if a resistance is calculated using the model of Formula 1 on the assumption that the resistance of a resistor device linearly depends on the voltage applied, a maximum value of error, as shown in the graph of FIG. 3, amounts to 12.77% since the model is identically applied regardless of the size of the resistor device. In FIG. 3, the X-axis indicates resistor devices have lengths between 0˜100 μm, and the Y-axis indicates the total resistance of each resistor device.
FIG. 4 shows a graph of measured resistance and resistance as modeled according to Formula 2. FIG. 4 shows that Formula 2 does not accurately model the resistance of a resistor device, even if the model of Formula 2 is applied on the assumption that a resistance of a resistor device depends on of the applied voltage according to a secondary function. In FIG. 4, the X-axis indicates the length of a resistor device and the Y-axis indicates the total resistance. If the width of the resistor device according to a variation of length is set to 0.5 μm, 1 μm, 2 μm, 5 μm or 10 μm, the total resistance according to Formula 2 does not match the measured resistance. In particular, if the total resistance is calculated according to Formula 2 for a resistor device having a length of 100 μm and a width of 5 μm, the difference between calculated and measured resistance amounts to 59.9%.
The error of the conventional SPICE models, as shown in FIG. 3 and FIG. 4, becomes more pronounced if the length and/or width of the resistor device is small.